Première page Précédent Suivant Dernière page Résumé Image

SMP Guest Kernels


Notes:

Xen has always supported SMP hosts
Important to make virtualization ubiquitous, enterprise
TLB: TransLation Buffer
TLB flushing
Flagging part or all of a CPU's translation lookaside buffer (which is a virtual-address-indexed cache of physical addresses) as invalid. Depending on hardware, the whole TLB may be flushed at any one time, or just a part.
IPI
Inter-processor Interrupt. On SMP machines this refers to an interrupt sent between CPUs, indicating some event that the other CPU needs to be aware of, for example smp_invalidate_interrupt, which invalidates a CPU's TLB.